Title:Nonvolatile Memory Friendly FPGA Synthesis
Time: 2017年12月21日10：00-11：00 （周四）
Non-volatilememory (NVM) technologies have been known for their advantages of largecapacity, low energy consumption, high error-resistance, and near-zero power-ondelay. It is expected that they will replace traditional SRAM as FPGAreconfigurable blocks. While NVMs promise FPGAs with more reconfigurableresources, lower power consumption, and higher resilience to powerinterruptions, they also impose two new design challenges: the slow writeperformance of NVMs may degrade FPGA reconfiguration speed, while their limitedwrite endurance constrains FPGA programming cycles. None of these NVM featuresare taken into consideration in current FPGA synthesis tools, which have beenoptimized solely for SRAM-based FPGAs. To tackle this limitation, this talkpresents a set approaches to tune the logic synthesis, placement and routing stages onFPGA synthesis flow to be NVM-friendly.
CHENGMO YANG received the B.S. degree fromPeking University, Beijing, China, and the M.S. and Ph.D. degrees from the University of California at San Diego, La Jolla,CA, USA. She is currently an Associate Professor with the Department of Electrical and ComputerEngineering at the University of Delaware. Her research interests lie in the broad areasof computer architecture, embedded systems, and design automation, with aparticular focus on improvingreliability, security, non-volatility, andenergy-efficiency of next generation computersystems. Dr.Yang received her NSF Career Award in 2013. She haspublished more than 50 technical papers at first-tier conferences and journals.She has 4 best paper awards and nominations. She serves/served as the programcommittee member of many conferences such as CODES-ISSS, DATE, HOST, ICCD, andLCTES.
杨乘默，美国特拉华大学副教授，终身教授，博士生导师。于北京大学获的本科学士学位，于美国加州大学圣地亚哥分校获的硕士和博士学位。现就职于美国特拉华大学电子和计算机工程系 。在国际顶级期刊杂志上发表论文60余篇，担任IEEE，ACM等多种学术期刊的评审和CODES-ISSS,DATE, HOST, ICCD, LCTES等会议的评审委员。主要研究方向包括嵌入式系统，计算机体系结构，硬件可靠性和硬件安全，非易失性存储等。
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